Conventional packaged microelectronic devices can include a singulated microelectronic die, an interposer substrate or lead frame attached to the die, and a molded casing around the die. The die generally includes an integrated circuit and a plurality of bond-pads coupled to the integrated circuit. The bond-pads are typically coupled to terminals on the interposer substrate or lead frame, and supply voltage, signals, etc., are transmitted to and from the integrated circuit via the bond-pads. In addition to the terminals, the interposer substrate can also include ball-pads coupled to the terminals by conductive traces supported in a dielectric material. Solder balls can be attached to the ball-pads in one-to-one correspondence to define a “ball-grid array.” Packaged microelectronic devices with ball-grid arrays are generally higher grade packages having lower profiles and higher pin counts than conventional packages using lead frames.
Packaged microelectronic devices such as those described above are used in cellphones, pagers, personal digital assistants, computers, and many other electronic products. To meet the demand for smaller electronic products, there is a continuing drive to increase the performance of packaged microelectronic devices, while at the same time reducing the height and the surface area or “footprint” of such devices on printed circuit boards. Reducing the size of high performance devices, however, is difficult because the sophisticated integrated circuitry requires more bond-pads, which results in larger ball-grid arrays and thus larger footprints. One technique for increasing the component density of microelectronic devices within a given footprint is to stack one device on top of another.
FIG. 1 schematically illustrates a first microelectronic device 10 attached to a second microelectronic device 20 in a wire-bonded, stacked-die arrangement. The first microelectronic device 10 includes a die 12 having an integrated circuit 14 electrically coupled to a series of bond-pads 16. A redistribution layer 18 electrically couples a plurality of first solder balls 11 to corresponding bond-pads 16. The second microelectronic device 20 similarly includes a die 22 having an integrated circuit 24 electrically coupled to a series of bond-pads 26. A redistribution layer 28 electrically couples a plurality of second solder balls 21 to corresponding bond-pads 26. Wire-bonds 13 extending from the first solder balls 11 to the second solder balls 21 electrically couple the first microelectronic device 10 to the second microelectronic device 20.
Forming the wire-bonds 13 in the stacked device shown in FIG. 1 can be complex and/or expensive because it requires placing individual wires between corresponding pairs of contacts (e.g., the first solder balls 11 and the second solder balls 21). Further, this type of installation may not be feasible for the high-density, fine-pitch arrays of some high-performance devices because the contacts are not spaced apart far enough to be connected to individual wire-bonds. As such, processes for packaging the dies have become a significant factor in manufacturing microelectronic devices.
To alleviate the problems associated with wire-bonds, Micron Technology, Inc. has developed through-wafer interconnects to electrically couple front side bond-pads with corresponding backside ball-pads. The through-wafer interconnects described in this paragraph are not admitted prior art, but rather they are described to provide background for the invention. Many such through-wafer interconnects are constructed by forming a plurality of holes through a microfeature workpiece. Although the through-wafer interconnects developed to date are quite useful, the open holes in the workpiece may limit certain processing and/or fabrication steps, such as dry etching. For example, the etchant can affect the materials within the holes. Furthermore, the holes through the workpiece do not allow some vacuum chucks to hold the workpiece in place for vapor deposition processes (e.g., chemical vapor deposition (CVD) or physical vapor deposition (PVD)). Therefore, it would be desirable to develop a process for forming through-wafer interconnects that can be used in dry etching processes and held by vacuum chucks.